/*
- Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*/
/ {
#ifdef FF_CAM_IRCUT0
cam_ircut0: cam_ircut0 {
status = “okay”;
compatible = “ap1511a,ircut”;
ircut-open-gpios = <&pca9555_0 0 GPIO_ACTIVE_HIGH>;
ircut-close-gpios = <&pca9555_0 1 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = “front”;
};
#endif
};
&i2c1 {
status = “okay”;
clock-frequency = <400000>;
pinctrl-0 = <&i2c1m0_pins>;
os08a10_0: os08a10-0@36 {
compatible = “ovti,os08a10”;
reg = <0x36>;
clocks = <&cru CLK_MIPI0_OUT2IO>;
clock-names = “xvclk”;
//reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
//pwdn-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = “rockchip,camera_default”;
pinctrl-0 = <&cam_clk0_pins>;
avdd-supply = <&vcc3v3_sys>;
dovdd-supply = <&vcc_1v8>;
dvdd-supply = <&vcc1v2_dvdd>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = “front”;
rockchip,camera-module-name = “CMK-OS08A10-FV1”;
rockchip,camera-module-lens-name = “M12-OS08A10-8MP-F18”;
#ifdef FF_CAM_IRCUT0
ir-cut = <&cam_ircut0>;
#endif
port {
os08a10_csi0_out: endpoint {
remote-endpoint = <&csi2_dphy0_input1>;
data-lanes = <1 2 3 4>;
};
};
};
};
&csi2_dphy0_hw {
status = “okay”;
};
&csi2_dphy0 {
status = “okay”;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi2_dphy0_input1: endpoint@1 {
reg = <1>;
remote-endpoint = <&os08a10_csi0_out>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi2_dphy0_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&mipi0_csi2 {
status = “okay”;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi2_dphy0_output>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
data-lanes = <1 2 3 4>;
};
};
};
};
&rkcif_mipi_lvds {
status = “okay”;
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = “okay”;
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_vir0>;
};
};
};
&rkisp_vir0 {
status = “okay”;
port {
#address-cells = <1>;
#size-cells = <0>;
isp_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
&rkisp_vir0_sditf {
status = “okay”;
};
&rkcif {
status = “okay”;
};
&rkcif_mmu {
status = “okay”;
};
&rkisp {
status = “okay”;
};
&rkisp_mmu {
status = “okay”;
};
&rkdvbm {
status = “okay”;
};
&rkvpss {
status = “okay”;
dvbm = <&rkdvbm>;
};
&rkvpss_mmu {
status = “okay”;
};
&rkvpss_vir0 {
status = “okay”;
};

