请教关于如何实现HDMI+EDP双屏异显的方案

固件类型:官方提供的固件
固件文件名称:rk3568_firefly_aioj/Android11.0/V1.0.2203172147/
固件下载地址:自行编译
Log日志:eDPbootuplogV20220317.zip

历史回顾:
问:

请问,固件对于eDP输出的屏幕是否支持,如果不支持,能否告知eDP怎么实现HDMI+eDP的双屏异显

luwy回:
此案例固件仅支持HDMI、DM-M10R800 V2 MIPI屏模模组、DM-M10R800 LVDS屏幕模组做三屏异显,不支持edp,如果想实现HDMI+eDP做双屏异显,要做到以下三步,前提是eDP屏已经调试好,如果未调试可以参考,kernel/arch/arm64/boot/dts/rockchip/rk3568-firefly-aioj-edp_M156X40.dts, 以下说明,基于此dts做说明
第一步:VP的挂载,hdmi和edp均支持挂载在vp0和vp1,因此有两种方案,分别是hdmi(vp0)+edp(vp1)和hdmi(vp1)+edp(vp0),以hdmi(vp0)+edp(vp1)做示例,在dts下添加如下:

&edp_phy {
        status = "okay";
};

&route_edp {
        status = "okay";
    connect = <&vp1_out_edp>;
};

&edp_in_vp0 {
        status = "disabled";
};

&edp_in_vp1 {
        status = "okay";
};

&route_hdmi {
    status = "okay";
    connect = <&vp0_out_hdmi>;
};

&hdmi {
    status = "okay";
};

&hdmi_in_vp0 {
    status = "okay";
};

&hdmi_in_vp1 {
    status = "disabled";
};

第二步:配置主副屏
可以配置HDMI做主屏或者edp做主屏,以下是HDMI主屏,EDP做副屏,补丁如下:

diff --git a/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk b/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
index 538b45b..5d5ef42 100644
--- a/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
+++ b/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
@@ -42,6 +42,7 @@ PRODUCT_AAPT_PREF_CONFIG := mdpi
 ## add Rockchip properties
 #
 PRODUCT_PROPERTY_OVERRIDES += vendor.hwc.device.primary=HDMI-A
+PRODUCT_PROPERTY_OVERRIDES += vendor.hwc.device.extend=eDP
 PRODUCT_PROPERTY_OVERRIDES += ro.sf.lcd_density=280
 PRODUCT_PROPERTY_OVERRIDES += ro.wifi.sleep.power.down=true

第三步:添加DoubleScreen 异显demo app编译

diff --git a/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk b/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
index 538b45b..bc7e110 100644
--- a/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
+++ b/device/rockchip/rk356x/rk3568_firefly_aioj/rk3568_firefly_aioj.mk
@@ -54,6 +54,9 @@ PRODUCT_PROPERTY_OVERRIDES += persist.dhcpserver.enable=1
 BOARD_HAVE_DONGLE := true
 #BOARD_HAS_RK_4G_MODEM := true

+PRODUCT_PACKAGES += \
+       DoubleScreen
+
 #for gnss
 BOARD_HAS_GPS := false

最后是编译固件,命令仅供参考,根据实际调试编译固件

./FFTools/make.sh -d rk3568-firefly-aioj-edp_M156X40 -j8 -l rk3568_firefly_aioj-userdebug
./FFTools/mkupdate/mkupdate.sh -l rk3568_firefly_aioj-userdebug

烧录新的固件,打开DoubleScreen app就可以看到hdmi和edp播放不同的内容了


问:
非常感谢,我先试试,我这个方案有点特殊,我是使用的eDP转HDMI的转接板,显示1080P的分辨率,我先试试吧,有问题再咨询您~

你好,我验证了双屏启动(eDP+HDMI),按您说的方法,似乎驱动还有问题,没有找到eDP设备,我有个log,麻烦帮忙看看
uboot里面有个错误log:
edp@fe0c0000 disconnected
kernel里面有下面的错误log:
行 512: [ 0.223258] rockchip-drm display-subsystem: Linked as a consumer to fe0c0000.edp
行 514: [ 0.229914] panel-simple edp-panel: Linked as a consumer to regulator.20
行 515: [ 0.229960] panel-simple edp-panel: edp-panel supply vsp not found, using dummy regulator
行 515: [ 0.229960] panel-simple edp-panel: edp-panel supply vsp not found, using dummy regulator
行 516: [ 0.230011] panel-simple edp-panel: Linked as a consumer to regulator.0
行 517: [ 0.230040] panel-simple edp-panel: edp-panel supply vsn not found, using dummy regulator
行 517: [ 0.230040] panel-simple edp-panel: edp-panel supply vsn not found, using dummy regulator

另外Android双屏显示APP的log我也附在了最下面,第一次弄eDP,感谢~~

回:
1.首先得将edp转HDMI验证好,再去验证双屏异显才有意义,不然你edp转HDMI都不能正常显示,异显肯定不行的,从log看都没有获取到modes,要先把edp转HDMI调好,再去验证异显
2. cat /sys/kernel/debug/gpio 看下hpd的io口是否有拉高, 还有看下cat /d/dri/0/summary, 发出来看下
3.麻烦另外提一个帖子,在另外的帖子回复你

tchip_askquestions
eDPbootuplogV20220317.zip (33.5 KB)

  1. edp转HDMI应该没有问题,购买的时候商家验证的
rk3568_firefly_aioj:/ $ cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/fdd60000.gpio, gpio0:
 gpio-5   (                    |vcc5v0_otg          ) out lo
 gpio-6   (                    |irq-gpio            ) in  hi
 gpio-8   (                    |vcc_4g_power_en     ) out hi
 gpio-16  (                    |firefly:blue:power  ) out hi
 gpio-18  (                    |hpd                 ) in  lo
 gpio-21  (                    |vcc3v3_lcd1_n       ) out lo
 gpio-23  (                    |vcc3v3_lcd0_n       ) out lo
 gpio-27  (                    |rtc-irq-gpio        ) in  hi
 gpio-28  (                    |vcc3v3_pcie         ) out lo
 gpio-29  (                    |vcc3v3_vga          ) out hi
 gpio-30  (                    |vcc5v0_host         ) out hi

gpiochip1: GPIOs 32-63, parent: platform/fe740000.gpio, gpio1:
 gpio-36  (                    |enable              ) out lo
 gpio-40  (                    |hp-ctl              ) out lo
 gpio-41  (                    |vcc3v3_lcd_edp      ) out hi

gpiochip2: GPIOs 64-95, parent: platform/fe750000.gpio, gpio2:
 gpio-73  (                    |bt_default_rts      ) in  hi
 gpio-89  (                    |mdio-reset          ) out hi
 gpio-91  (                    |mdio-reset          ) out hi
 gpio-94  (                    |reset               ) out hi
 gpio-95  (                    |bt_default_wake_host) in  hi

gpiochip3: GPIOs 96-127, parent: platform/fe760000.gpio, gpio3:
 gpio-96  (                    |bt_default_reset    ) out lo
 gpio-97  (                    |cs                  ) out hi
 gpio-98  (                    |vcc_hub_power_en    ) out hi
 gpio-100 (                    |tp_power_en         ) out hi
 gpio-102 (                    |vcc_hub_reset_en    ) out hi
 gpio-103 (                    |pcie_pi6c_oe_en     ) out lo
 gpio-109 (                    |bt_default_wake     ) in  lo
 gpio-117 (                    |spk-gpio            ) out lo
 gpio-125 (                    |reset               ) out lo

gpiochip4: GPIOs 128-159, parent: platform/fe770000.gpio, gpio4:

gpiochip6: GPIOs 200-215, parent: i2c/1-0021, pca9555, can sleep:
 gpio-208 (                    |firefly:fan_ctl:user) out hi
 gpio-209 (                    |reset               ) out hi
 gpio-210 (                    |firefly:yellow:user ) out hi
 gpio-215 (                    |power               ) out hi

gpiochip5: GPIOs 511-511, parent: platform/rk805-pinctrl, rk817-gpio, can sleep:
cat /d/dri/0/summary
Video Port0: ACTIVE
    Connector: HDMI-A-1
	bus_format[100a]: RGB888_1X24
	overlay_mode[0] output_mode[f] color_space[0]
    Display mode: 3840x2160p60
	clk[594000] real_clk[594000] type[40] flag[5]
	H: 3840 4016 4104 4400
	V: 2160 2168 2178 2250
    Cluster1-win0: ACTIVE
	win_id: 6
	format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
	rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
	csc: y2r[0] r2y[0] csc mode[0]
	zpos: 0
	src: pos[0, 0] rect[1920 x 1080]
	dst: pos[0, 0] rect[3840 x 2160]
	buf[0]: addr: 0x0000000000818000 pitch: 7680 offset: 0
Video Port1: DISABLED

如果检测到有屏幕信号的话,hpd脚是会拉高的,是一个热插拔脚,其次商家验证是验证转接模块是正常的,不代表接上板子测试就是正常的,目前来看,没有检测到有屏幕连接,你需要排查一下模块是否有正常工作,还有麻烦把dts 上传看下

luwy 发表于 2022-3-25 09:33
如果检测到有屏幕信号的话,hpd脚是会拉高的,是一个热插拔脚,其次商家验证是验证转接模块是正常的,不代 …

kernel/arch/arm64/boot/dts/rockchip/rk3568-firefly-aioj-edp_M156X40.dts如下

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
 *
 */

 /dts-v1/;

#include "rk3568-firefly-aioj.dtsi"

/ {
	model = "AIO-3568J HDMI+EDP156 (Android)";
	compatible = "rockchip,rk3568-firefly-aioj-edp_m156x40", "rockchip,rk3568";

	vcc3v3_lcd_edp: vcc3v3-lcd-edp {
		compatible = "regulator-fixed";
		gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-name = "vcc3v3_lcd_edp";
		regulator-boot-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};

    edp_panel: edp-panel {
		compatible = "simple-panel";
		status = "okay";
		power-supply = <&vcc3v3_lcd_edp>;
		enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
		//bus-format = <MEDIA_BUS_FMT_RBG888_1X24>;
                //prepare-delay-ms = <201>;
                //enable-delay-ms = <201>;

		backlight = <&backlight>;
		display-timings {
			native-mode = <&timing0>;
			timing0: timing0 {
				clock-frequency = <140000000>;
				hactive = <1920>;
				vactive = <1080>;
				hfront-porch = <40>;
				hsync-len = <40>;
				hback-porch = <80>;
				vfront-porch = <16>;
				vsync-len = <8>;
				vback-porch = <16>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};

		ports {
			panel_in_edp: endpoint {
				remote-endpoint = <&edp_out_panel>;
			};
		};
	};

	backlight: backlight {
		status = "okay";
		compatible = "pwm-backlight";
		//enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; // EDP_BL_EN
		pwms = <&pwm14 0 500000 0>;
		brightness-levels = <
			  0   1   2   3   4   5   6   7
			  8   9  10  11  12  13  14  15
			 16  17  18  19  20  21  22  23
			 24  25  26  27  28  29  30  31
			 32  33  34  35  36  37  38  39
			 40  41  42  43  44  45  46  47
			 48  49  50  51  52  53  54  55
			 56  57  58  59  60  61  62  63
			 64  65  66  67  68  69  70  71
			 72  73  74  75  76  77  78  79
			 80  81  82  83  84  85  86  87
			 88  89  90  91  92  93  94  95
			 96  97  98  99 100 101 102 103
			104 105 106 107 108 109 110 111
			112 113 114 115 116 117 118 119
			120 121 122 123 124 125 126 127
			128 129 130 131 132 133 134 135
			136 137 138 139 140 141 142 143
			144 145 146 147 148 149 150 151
			152 153 154 155 156 157 158 159
			160 161 162 163 164 165 166 167
			168 169 170 171 172 173 174 175
			176 177 178 179 180 181 182 183
			184 185 186 187 188 189 190 191
			192 193 194 195 196 197 198 199
			200 201 202 203 204 205 206 207
			208 209 210 211 212 213 214 215
			216 217 218 219 220 221 222 223
			224 225 226 227 228 229 230 231
			232 233 234 235 236 237 238 239
			240 241 242 243 244 245 246 247
			248 249 250 251 252 253 254 255>;
		default-brightness-level = <200>;
    };
};

&pwm14 {
	status = "okay";
};

&edp {
	status = "okay";
	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
	force-hpd;
	enable-delay-ms = <200>; // vcc to hpd delay 200ms for power on sequence

	ports {
		edp_out: port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			edp_out_panel: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&panel_in_edp>;
			};
		};
	};
};

&edp_phy {
	status = "okay";
};

&route_edp {
	status = "okay";
	connect = <&vp1_out_edp>;
};

&edp_in_vp0 {
	status = "disabled";
};

&edp_in_vp1 {
	status = "okay";
};

&route_hdmi {
    status = "okay";
    connect = <&vp0_out_hdmi>;
};

&hdmi {
    status = "okay";
};

&hdmi_in_vp0 {
    status = "okay";
};

&hdmi_in_vp1 {
    status = "disabled";
};

另外我想咨询下,下面图片里面EDP插座里面pin 1是最上面一个还是最下面一个pin,我没有从资料里面看出来:

(1)关于dts问题,有可能是时序问题,先把以下节点和属性先关掉再调试,背光节点因为是edp转HDMI,也可以关闭

&edp {
        status = "okay";
        hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
        //force-hpd;
        //enable-delay-ms = <200>; // vcc to hpd delay 200ms for power on sequence
		......
};
.....
&route_edp {
	status = "disabled";
	connect = <&vp1_out_edp>;
};
......

而关于时序问题,你需要排查vcc3v3_lcd_edp和edp转hdmi供电是否正常,还有你可以试试,接上hdmi,休眠唤醒是否可以正常显示

(2) 图中最上面的脚是pin1,有一个小圆点提示的就是1脚

本帖最后由 junyeer 于 2022-4-7 00:09 编辑

luwy 发表于 2022-4-2 10:34
(1)关于dts问题,有可能是时序问题,先把以下节点和属性先关掉再调试,背光节点因为是edp转HDMI,也可以关 …

好的,目前问了厂家,可以确定的是EDP排线反了,再重新购买,后续更新调试进展。
另外这个LCD使能的GPIO我看电路图应该不是这个

  • vcc3v3_lcd_edp: vcc3v3-lcd-edp {
  • gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;

应该是这个:GPIO3_C3

你好,如原理图,EDP_VCC_EN(GPIO1_B1)作为VCC_LCD使能脚

luwy 发表于 2022-4-7 09:24
你好,如原理图,EDP_VCC_EN(GPIO1_B1)作为VCC_LCD使能脚

你好,非常感谢,我确认了是线材的问题,已经可以双屏显示了
我还有一个小问题:DoubleScreen这个APP能看到源码么,或者什么可以指导APP开发的说明

需要DoubleScreen 源码可以联系商务sales@t-firefly.com

luwy 发表于 2022-4-16 09:13
需要DoubleScreen 源码可以联系商务

好的,谢谢
双屏目前可以显示了,demo也可以运行,但目前有碰到了另外一个问题:当投票后,只能识别副屏的触摸,主屏上的触摸有事件,但没有实际反馈,经测试,副屏响应了主屏的事件,请再帮忙分析下

使用DoubleScreen程序测试的

(1)分别接单个TP是否正常
(2)用dumpsys input 看一下两个TP源的相关信息,是否相同,有可能判定两个TP都作为了副屏TP

可以参考一下网上双屏异触的相关资料,如https://www.it610.com/article/1297160888054259712.htm

嗯,谢谢,已按照第一种方法设置了主屏可以触摸了,目前不需要副屏触摸