RK3588S 可以支援 OLED 2880x1800 點屏嗎?(已解決)

EdgeHH · September 18, 2024, 8:49am

本帖最后由 EdgeHH 于 2025-7-28 13:35 编辑

Dear 前輩們:
煩請協助和指導一下，謝謝!

                需點屏 規格SDC 14" OLED 2880x1800 eDP，目前編輯源碼尚未點屏成功

                 請教一下，點OLED 需特別寫入指令嗎? 與一般點TFT 屏 eDP Timing set 相同嗎?

qq_2317783075 · September 19, 2024, 6:23am

EDP屏应该是不需要下初始化指令的，要看看屏的规格书
另外就是检查内核配置，我们点edp的4K屏都是可以的

EdgeHH · September 20, 2024, 12:21am

qq号2317783075 发表于 2024-9-19 14:23
EDP屏应该是不需要下初始化指令的，要看看屏的规格书
另外就是检查内核配置，我们点edp的4K屏都是可以的

好的，我再試試微調TIMING和檢查接線
Thanks!!

EdgeHH · October 8, 2024, 3:03am

本帖最后由 EdgeHH 于 2024-10-8 13:17 编辑

大老們，此OLED 屏還是點不起來，可否請大老們指導一下小弟明燈，謝謝!

SPEC 有描述 Brightness Control for Intel

address Values
0x0354 {0x90, 0x01} : 400nit

這指令在RK3588 需要下嗎? 如果需要，可否提供範例參考

在此先謝謝大老前輩們，謝謝!!!

qq_2317783075 · October 8, 2024, 6:31am

规格书发上来看看

EdgeHH · October 9, 2024, 5:20am

本帖最后由 EdgeHH 于 2025-1-15 11:55 编辑

部份規格書如件
2880X1800 information.pdf (885 KB)

EdgeHH · January 17, 2025, 3:56am

目前遇到問題: RK3588S HDMI0/eDP0 Frame rate =60z 1920X1200 可以正常顯屏 ,
Frame rate =30z 3840X2400 可以正常顯屏 , 大於30Hz無法顯示(黑屏)
Frame rate =30z 2880X1800 也無法顯示(黑屏)
查詢datasheet, eDP0 可以支援5.4Gbps , 但我怎麼調都無法正常成功點亮3840x2400 Frame rate=60Hz,

請教各位前輩，這是設定問題，還是硬件(Bridge PCBa)問題?
不知各位大大是否有遇見此類問題，煩請解惑~謝謝!

系統Video Portx信息

C:\adb>adb shell wm size
Physical size: 2880x1800

C:\adb>adb shell
rk3588s_s:/ $ cat /d/dri/0/summary
Video Port0: ACTIVE
Connector: eDP-1
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[f] color_space[0], eotf:0
Display mode: 2880x1800p60
clk[326131] real_clk[300000] type[48] flag[a]
H: 2880 2912 2920 2980
V: 1800 1808 1816 1824
Esmart0-win0: ACTIVE
win_id: 8
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 0] rect[2880 x 1800]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster0-win0: ACTIVE
win_id: 0
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[2880 x 1800]
dst: pos[0, 0] rect[2880 x 1800]
buf[0]: addr: 0x00000000f46e6000 pitch: 11520 offset: 0
Video Port1: DISABLED
Video Port2: ACTIVE
Connector: DSI-1
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[0] color_space[0], eotf:0
Display mode: 800x1280p54
clk[62100] real_clk[62100] type[48] flag[0]
H: 800 840 845 865
V: 1280 1310 1315 1327
Esmart2-win0: ACTIVE
win_id: 9
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 390] rect[800 x 500]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster2-win0: ACTIVE
win_id: 4
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[800 x 1280]
dst: pos[0, 0] rect[800 x 1280]
buf[0]: addr: 0x00000000f85c1000 pitch: 3200 offset: 0
Video Port3: ACTIVE
Connector: DSI-2
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[0] color_space[0], eotf:0
Display mode: 800x1280p54
clk[62100] real_clk[60495] type[48] flag[0]
H: 800 840 845 865
V: 1280 1310 1315 1327
Esmart3-win0: ACTIVE
win_id: 11
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 390] rect[800 x 500]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster3-win0: ACTIVE
win_id: 6
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[800 x 1280]
dst: pos[0, 0] rect[800 x 1280]
buf[0]: addr: 0x00000000f3f3c000 pitch: 3200 offset: 0
rk3588s_s:/ $

2880x180.dtsi
&dsi0 {
status = “okay”;
};

&dsi0_in_vp3 {
status = “disabled”;
};

&dsi0_in_vp2 {
status = “okay”;
};

&dsi0_panel {
status = “okay”;
reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&lcd0_rst_gpio>;
};

&route_dsi0 {
status = “disabled”;
connect = <&vp3_out_dsi0>;
};

&pwm6 {
status = “okay”;
pinctrl-names = “active”;
pinctrl-0 = <&pwm6m0_pins>;
};

&backlight {
pwms = <&pwm6 0 25000 0>;
status = “okay”;
};

&route_dsi1 {
status = “disabled”;
connect = <&vp3_out_dsi1>;
};

&dsi1_panel {
status = “okay”;
reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-names = “default”;
pinctrl-0 = <&lcd1_rst_gpio>;
};

&dsi1 {
status = “okay”;
};

&dsi1_in_vp2 {
status = “disabled”;
};

&dsi1_in_vp3 {
status = “okay”;
};

&dp0 {
status = “okay”;
};

&dp0_in_vp2 {
status = “disabled”;
};

&dp0_in_vp1 {
status = “okay”;
};

&dp0_sound{
status = “okay”;
};

&spdif_tx2{
status = “okay”;
};

&hdmi0 {
//status = “okay”;
status = “disabled”; //modify for EDP0 24.04.10
};

&hdmi0_in_vp0 {
//status = “okay”;
status = “disabled”; //modify for EDP0 25.01.16
};

&hdmi0_sound {
//status = “okay”;
status = “disabled”; //modify for EDP0 25.01.16
};

&hdptxphy_hdmi0 {
//status = “okay”;
status = “disabled”; //modify for EDP0 25.01.16
};

&route_hdmi0{
//status = “okay”;
status = “disabled”; //modify for EDP0 25.01.16
};

/ {
panel-edp {
status = “okay”;
compatible = “simple-panel”;
panel-timing {
clock-frequency = <326131200>;// 652262400(120HZ) 326131200(60HZ)
hactive = <2880>;
vactive = <1800>;
hback-porch = <60>;//100
hfront-porch = <32>;//48
vback-porch = <8>;// 16
vfront-porch = <8>;//8
hsync-len = <8>;//32
vsync-len = <8>;//8
hsync-active = <0>;//1
vsync-active = <0>;//1
de-active = <0>;//0
pixelclk-active = <0>;//0
swap-rb = <0>;//0
swap-rg = <0>;//0
swap-gb = <0>;//0

	};

	port {
		panel_in_edp: endpoint {
			remote-endpoint = <&edp_out_panel>;
		};
	};
};

};

&edp0 {
force-hpd;
status = “okay”;

ports {
	port@1 {
		reg = <1>;

		edp_out_panel: endpoint {
			remote-endpoint = <&panel_in_edp>;

		};
	};
};

};

&hdptxphy0{
status = “okay”;
};

&edp0_in_vp0 {
status = “okay”;
};

&route_edp0 {
connect = <&vp0_out_edp0>;
status = “okay”;
};

qq_2317783075 · January 17, 2025, 7:51am

不是吧，大半年都过去了，还没点亮啊

EdgeHH · January 20, 2025, 4:30am

本帖最后由 EdgeHH 于 2025-1-20 13:10 编辑

qq号2317783075 发表于 2025-1-17 15:51
不是吧，大半年都过去了，还没点亮啊

之前有用別的主機板點了，目前再回到RK3588S 處理顯示屏和觸控屏

可否指導一下(範例), 3588s type C to DP 如何俢改Timing set以符合2880x1800 OLED 顯示屏，
目前改了EDID 內容，怎麼改都無法正常輸出 (可以說改了後開機都看不到2880x1800 resolution)

EdgeHH · July 28, 2025, 5:30am

OLED T-CON Board bandwidth更新後已可正常㸃亮