Is max clock frequency 24MHz? 14MHz?
A summary of the frequency ratio restrictions between the bit-rate clock (sclk_out / sclk_in) and the SPI peripheral clock (spi_clk) are described as,
When SPI Controller works as master, the Fspi_clk>= 2 × (maximum Fsclk_out)
When SPI Controller works as slave, the Fspi_clk>= 6 × (maximum Fsclk_in)
zhansb Posted at 3/30/2015 14:19
A summary of the frequency ratio restrictions between the bit-rate clock (sclk_out / scl …
what is the maximun Fspi_clk?
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