Analyze the DDR initialization

Chip Platform Rockchip
1

Hi, I want to analysis the DDR initial flow and want to know how 32_LPDDR2_200MHz_LPDDR3_200MHz_DDR3_200MHz_20141007.bin be generated.
Below log is the firefly-rk3288 platfrom boot log before U-boot.
My question is I can’t find the source code related to DDR initial in u-boot/
Where could I find related information, thanks.

DDR Version 1.00 20141007
In
SRX
Channel a: DDR3 200MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
Channel b: DDR3 200MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
OUT

shuju.rar (51 KB)
800.gif

2

Soc vendor have not open the source

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