ok rechecked the wiring and now the uart works
here what I get:
DDR Version 1.24 20191016
In
Channel 0: DDR3, 800MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
Channel 1: DDR3, 800MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
256B stride
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA17AA1, stride = 0xD
OUT
Boot1: 2019-03-14, version: 1.19
CPUId = 0x0
ChipType = 0x10, 244
mmc: ERROR: SDHCI:Transfer data timeout
mmc: ERROR: SDHCI ERR:cmd:0x153a,stat:0x0
mmc: ERROR: Tuning procedure failed, falling back to fixed sampling clock
mmc: ERROR: tuning execution failed
emmc reinit
mmc: ERROR: SDHCI:Transfer data timeout
mmc: ERROR: SDHCI ERR:cmd:0x153a,stat:0x0
mmc: ERROR: Tuning procedure failed, falling back to fixed sampling clock
mmc: ERROR: tuning execution failed
emmc reinit
mmc: ERROR: SDHCI:Transfer data timeout
mmc: ERROR: SDHCI ERR:cmd:0x153a,stat:0x0
mmc: ERROR: Tuning procedure failed, falling back to fixed sampling clock
mmc: ERROR: tuning execution failed
SdmmcInit=2 1
mmc0:cmd5,20
SdmmcInit=0 0
BootCapSize=0
UserCapSize=29754MB
FwPartOffset=2000 , 0
StorageInit ok = 35213656
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT 0x3380ec0 signature is wrong
recovery gpt…
GPT 0x3380ec0 signature is wrong
recovery gpt fail!
LoadTrust Addr:0x4000
No find bl30.bin
No find bl32.bin
Load uboot, ReadLba = 2000
hdr 0000000003380880 + 0x0:0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
Load OK, addr=0x200000, size=0xb1cb0
RunBL31 0x40000
NOTICE: BL31: v1.3(debug):42583b6
NOTICE: BL31: Built : 07:55:13, Oct 15 2019
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
INFO: plat_rockchip_pmu_init(1190): pd status 3e
INFO: BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR: Error initializing runtime service opteed_fast
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
U-Boot 2020.07-armbian (Dec 11 2020 - 22:39:11 +0100)
SoC: Rockchip rk3399
Reset cause: POR
Model: Firefly-RK3399 Board
DRAM: 3.9 GiB
PMIC: RK808
Cannot find regulator pwm init_voltage
MMC: mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from MMC… *** Warning - bad CRC, using default environment
In: serial@ff1a0000
Out: serial@ff1a0000
Err: serial@ff1a0000
Model: Firefly-RK3399 Board
Net: eth0: ethernet@fe300000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1…
Found U-Boot script /boot/boot.scr
3185 bytes read in 6 ms (517.6 KiB/s)
## Executing script at 00500000
Boot script loaded from mmc 1
116 bytes read in 6 ms (18.6 KiB/s)
13506866 bytes read in 585 ms (22 MiB/s)
27507200 bytes read in 1179 ms (22.2 MiB/s)
76119 bytes read in 15 ms (4.8 MiB/s)
2698 bytes read in 11 ms (239.3 KiB/s)
Applying kernel provided DT fixup script (rockchip-fixup.scr)
## Executing script at 09000000
## Loading init Ramdisk from Legacy Image at 06000000 …
Image Name: uInitrd
Image Type: AArch64 Linux RAMDisk Image (gzip compressed)
Data Size: 13506802 Bytes = 12.9 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum … OK
## Flattened Device Tree blob at 01f00000
Booting using the fdt blob at 0x1f00000
Loading Ramdisk to f5234000, end f5f158f2 … OK
Loading Device Tree to 00000000f51b9000, end 00000000f5233fff … OK
Starting kernel …
and it freeze there