Hi Sir,
I am trying to interface the 10.1 Inch 1280x800 LVDS display with AIO Rk3399J Board.
I did all the changes in DTS file: kernel/arch/arm64/boot/dts/rockchip/rk3399-firefly-aio-lvds.dts file
and TC358764_5_774_5XBG_DSI-LVDS_Tv11p_nm_1280x800.xls sheet As per LCD — Firefly Wiki URL.
But after powering on the board and LCD module I am not able to see anything on the LCD. it shows a blank screen.
Please find attached -
- My DTS File
- screenshot of LVDS display datasheet timing parameters, TC358764_5_774_5XBG_DSI-LVDS_Tv11p_nm_1280x800.xls sheet and my display connection.
- Timing parameters generated by TC358764_5_774_5XBG_DSI-LVDS_Tv11p_nm_1280x800.xls sheet.
Please suggest what I am doing wrong OR what configuration I am missing.
panel-init-sequence = [
29 02 06 3C 01 05 00 03 00
29 02 06 14 01 03 00 00 00
29 02 06 64 01 05 00 00 00
29 02 06 68 01 05 00 00 00
29 02 06 6C 01 05 00 00 00
29 02 06 70 01 05 00 00 00
29 02 06 34 01 1F 00 00 00
29 02 06 10 02 1F 00 00 00
29 02 06 04 01 01 00 00 00
29 02 06 04 02 01 00 00 00
29 02 06 50 04 20 01 F4 03
29 02 06 54 04 46 00 46 00
29 02 06 58 04 00 05 14 00
29 02 06 5C 04 05 00 0F 00
29 02 06 60 04 20 03 03 00
29 02 06 64 04 01 00 00 00
29 02 06 A0 04 06 80 44 00
29 02 06 A0 04 06 80 04 00
29 02 06 04 05 04 00 00 00
29 02 06 9C 04 31 00 00 00
];
panel-exit-sequence = [
05 05 01 28
05 78 01 10
];
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <148000000>; //166000000 @50
hactive = <1280>;
vactive = <800>;
hsync-len = <70>; //20, 50
hback-porch = <70>; //50, 56
hfront-porch = <20>;//50, 30 //1580
vsync-len = <5>;
vback-porch = <15>;
vfront-porch = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
Thanks
rk3399-firefly-aio-lvds-HSX101H40C.pdf (59.2 KB)
