请教： rk3128 点rgb屏问题咨询

yubang · December 5, 2017, 10:14am

各位好！

我尝试在rk3128上点一款 800x480 的 rgb 屏，做了以下改动：
（主要是屏蔽网卡相关的，使能lcd rgb相关的）
rk3128-fireprime.dts 文件：

#include “lcd-md070nl.dtsi”

&fb {
//rockchip,disp-mode = <NO_DUAL>;
//rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
//rockchip,disp-policy = <DISPLAY_POLICY_SDK>;
rockchip,disp-mode = ;
//rockchip,disp-mode = <ONE_DUAL>;
rockchip,uboot-logo-on = <0>;//1
};

&disp_timings {
native-mode = <&timing0>;
};

&rk_screen {
display-timings = <&disp_timings>;
};

&lvds {
status = “okay”;

pinctrl-names = "lcdc";
pinctrl-0 = <&lcdc0_lcdc_d>;

};

&lcdc {
status = “okay”;

backlight = <&backlight>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&lcdc0_lcdc>;
pinctrl-1 = <&lcdc0_gpio>;
    rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
power_ctr: power_ctr {
	rockchip,debug = <0>;
	lcd_en: lcd_en {
		rockchip,power_type = <GPIO>;
		gpios = <&gpio3 GPIO_B3 GPIO_ACTIVE_HIGH>;
		rockchip,delay = <10>;
	};
};

};

&hdmi {
status = “disabled”;
//rockchip,hdmi_audio_source = <1>;
};

//&gmac_clkin {
// clock-frequency = <125000000>;
//};

//&gmac {
//pmu_regulator = “act_ldo5”;
//pmu_enable_level = <1>; //1->HIGH, 0->LOW
//power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
//reset-gpio = <&gpio2 GPIO_D0 GPIO_ACTIVE_LOW>;
//phyirq-gpio = <&gpio0 GPIO_D0 GPIO_ACTIVE_LOW>;
//phy-mode = “rgmii”;
//clock_in_out = “input”;
//tx_delay = <0x30>;
//rx_delay = <0x10>;
//};

rk312x.dtsi 文件：
//gmac: eth@2008c000 {
// compatible = “rockchip,rk312x-gmac”;
// reg = <0x2008c000 0x4000>;
// interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; /irq=88/
// interrupt-names = “macirq”;
// clocks = <&clk_mac_ref>, <&clk_gates2 6>,
// <&clk_gates2 7>, <&clk_gates2 4>,
// <&clk_gates2 5>, <&clk_gates10 10>,
// <&clk_gates10 11>;
// clock-names = “clk_mac”, “mac_clk_rx”,
// “mac_clk_tx”, “clk_mac_ref”,
// “clk_mac_refout”, “aclk_mac”,
// “pclk_mac”;
// phy-mode = “rgmii”;
// pinctrl-names = “default”;
// pinctrl-0 = <&gmac_rxdv &gmac_txclk &gmac_crs &gmac_rxclk &gmac_mdio &gmac_txen &gmac_clk &gmac_rxer &gmac_rxd1 &gmac_rxd0 &gmac_txd1 &gmac_txd0 &gmac_rxd3 &gmac_rxd2 &gmac_txd2 &gmac_txd3 &gmac_col_gpio &gmac_mdc>;
//};

lcdc: lcdc@1010e000 {
compatible = “rockchip,rk312x-lcdc”;
rockchip,prop = ;
reg = <0x1010e000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates6 0>, <&dclk_lcdc0>, <&clk_gates6 1>, <&sclk_lcdc0>, <&pd_vop>, <&clk_cpll>;
clock-names = “aclk_lcdc”, “dclk_lcdc”, “hclk_lcdc”, “sclk_lcdc”, “pd_lcdc”, “sclk_pll”;
rockchip,iommu-enabled = <1>;
status = “disabled”;
};

rk312x-pinctrl.dtsi文件：
//gpio2_gmac {
// gmac_rxdv:gmac-rxdv {
// rockchip,pins = <GMAC_RXDV>;
// rockchip,pull = <VALUE_PULL_DEFAULT>;
// };

	//	gmac_txclk:gmac-txclk {
	//		rockchip,pins = <GMAC_TXCLK>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_crs:gmac-crs {
	//		rockchip,pins = <GMAC_CRS>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_rxclk:gmac-rxclk {
	//		rockchip,pins = <GMAC_RXCLK>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_mdio:gmac-mdio {
	//		rockchip,pins = <GMAC_MDIO>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_txen:gmac-txen {
	//		rockchip,pins = <GMAC_TXEN>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_clk:gmac-clk {
	//		rockchip,pins = <GMAC_CLK>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};
	//	gmac_rxer:gmac-rxer {
	//		rockchip,pins = <GMAC_RXER>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_rxd1:gmac-rxd1 {
	//		rockchip,pins = <GMAC_RXD1>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_rxd0:gmac-rxd0 {
	//		rockchip,pins = <GMAC_RXD0>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_txd1:gmac-txd1 {
	//		rockchip,pins = <GMAC_TXD1>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_txd0:gmac-txd0 {
	//		rockchip,pins = <GMAC_TXD0>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};
	//	gmac_rxd3:gmac-rxd3 {
	//		rockchip,pins = <GMAC_RXD3>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_rxd2:gmac-rxd2 {
	//		rockchip,pins = <GMAC_RXD2>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_txd2:gmac-txd2 {
	//		rockchip,pins = <GMAC_TXD2>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_txd3:gmac-txd3 {
	//		rockchip,pins = <GMAC_TXD3>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_col:gmac-col {
	//		rockchip,pins = <GMAC_COL>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_col_gpio:gmac-col-gpio {
	//		rockchip,pins = <GPIO2_D0>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};

	//	gmac_mdc:gmac-mdc {
	//		rockchip,pins = <GMAC_MDC>;
	//		rockchip,pull = <VALUE_PULL_DEFAULT>;
	//	};
	//};

	gpio2_lcdc0 {
		lcdc0_lcdc:lcdc0-lcdc {
			rockchip,pins =
					<LCDC0_DCLK>,
					<LCDC0_DEN>,
					<LCDC0_HSYNC>,
					<LCDC0_VSYNC>;
			rockchip,pull = <VALUE_PULL_DISABLE>;
		};

		lcdc0_gpio:lcdc0-gpio {
			rockchip,pins =
					<FUNC_TO_GPIO(LCDC0_DCLK)>,
					<FUNC_TO_GPIO(LCDC0_DEN)>,
					<FUNC_TO_GPIO(LCDC0_HSYNC)>,
					<FUNC_TO_GPIO(LCDC0_VSYNC)>;
			rockchip,pull = <VALUE_PULL_DISABLE>;
		};

	};

	gpio2_lcdc0_d {
		lcdc0_lcdc_d: lcdc0-lcdc_d {
			rockchip,pins =
					<LCDC0_D10>,
					<LCDC0_D11>,
					<LCDC0_D12>,
					<LCDC0_D13>,
					<LCDC0_D14>,
					<LCDC0_D15>,
					<LCDC0_D16>,
					<LCDC0_D17>,
					<LCDC0_D18>,
					<LCDC0_D19>,
					<LCDC0_D20>,
					<LCDC0_D21>,
					<LCDC0_D22>,
					<LCDC0_D23>;
			rockchip,pull = <VALUE_PULL_DISABLE>;
		};

		lcdc0_lcdc_gpio: lcdc0-lcdc_gpio {
			rockchip,pins =
					<FUNC_TO_GPIO(LCDC0_D10)>,
					<FUNC_TO_GPIO(LCDC0_D11)>,
					<FUNC_TO_GPIO(LCDC0_D12)>,
					<FUNC_TO_GPIO(LCDC0_D13)>,
					<FUNC_TO_GPIO(LCDC0_D14)>,
					<FUNC_TO_GPIO(LCDC0_D15)>,
					<FUNC_TO_GPIO(LCDC0_D16)>,
					<FUNC_TO_GPIO(LCDC0_D17)>,
					<FUNC_TO_GPIO(LCDC0_D18)>,
					<FUNC_TO_GPIO(LCDC0_D19)>,
					<FUNC_TO_GPIO(LCDC0_D20)>,
					<FUNC_TO_GPIO(LCDC0_D21)>,
					<FUNC_TO_GPIO(LCDC0_D22)>,
					<FUNC_TO_GPIO(LCDC0_D23)>;
			rockchip,pull = <VALUE_PULL_DOWN>;
		};

	};

lcd-md070nl.dtsi 文件：
/*

RockChip. LCD_MD070NL22-50N

*/

/ {
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
screen-type = <SCREEN_RGB>;
out-face = <OUT_P888>;
clock-frequency = <33000000>;//13000000//33000000//27000000//32000000
hactive = <800>;
vactive = <480>;
hback-porch = <46>;
hfront-porch = <210>;
vback-porch = <23>;
vfront-porch = <22>;
hsync-len = <40>;
vsync-len = <20>;
hsync-active = <1>;
vsync-active = <1>;
de-active = <0>;
pixelclk-active = <1>;
swap-rb = <0>;
swap-rg = <0>;
swap-gb = <0>;
};
};
};

通过以上的改动后，接上屏，有显示，但是显示有问题，一个是屏幕的上半部分和下半部分重复显示了；另一个是屏的右面有一部分无显示；（如图1，图2，图3）

对于上面的问题，我尝试去调整hback-porch ，hfront-porch ，vback-porch ，vfront-porch ，hsync-len ，vsync-len ，hsync-active ，vsync-active ，de-active ，
pixelclk-active；但是基本没有任何改变，还是如图的情况；

请问有遇到过类似情况的朋友吗？是否是哪些地方改动没完成吗？遇到过类似情况的朋友，请指导下，被这个问题一直困扰着；
（我用的代码是天启的fireprime 的Android5.1的代码）

yubang · December 5, 2017, 10:19am

上面问题的附图1，图2，图3

sl410 · January 17, 2018, 6:43am

解决了吗？

carter123456 · February 2, 2018, 10:20am

请问问题解决了吗，我也遇到图一的问题，544012636. 能否咨询你一下多谢了

130544138 · February 7, 2018, 5:57am

想咨询下你的RGB点屏能否指导一下QQ365058096.多谢

user1691 · June 2, 2018, 4:02am

出现一样的情况，请问该怎样解决了，很急，麻烦回复，谢谢

chandong83 · January 15, 2019, 10:15am

i had the same problem.
The problem was that DCLK changed while operating in TV Mode.
disable tv out

&tve {
status = “disabled”;
//test_mode = <0>;
};