DDR V1.09 a930779e06 typ 22/11/21-17:50:56
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=4096MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=4096MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
Manufacturer ID:0xff
CH0 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH1 RX Vref:28.7%, TX Vref:22.8%,21.8%
CH2 RX Vref:29.7%, TX Vref:21.8%,0.0%
CH3 RX Vref:27.7%, TX Vref:22.8%,0.0%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL board init
U-Boot SPL 2017.09-gc060f28d70-220414 #zyf (Apr 18 2022 - 18:13:34)
Failed to set cpub01
Failed to set cpub23
unknown raw ID phN
unrecognized JEDEC id bytes: 00, 00, 00
Trying to boot from MMC2
MMC: no card present
mmc_init: -123, time 0
spl: mmc init failed with error: -123
Trying to boot from MMC1
Trying fit image at 0x4000 sector
## Verified-boot: 0
## Checking atf-1 0x00040000 ... sha256(bb1bbbc832...) + OK
## Checking uboot 0x00200000 ... sha256(48705479e7...) + OK
## Checking fdt 0x0035d990 ... sha256(c07f4a4d71...) + OK
## Checking atf-2 0x000f0000 ... sha256(30812190d0...) + OK
## Checking atf-3 0xff100000 ... sha256(cb7bdbec2b...) + OK
## Checking optee 0x08400000 ... sha256(fde0860845...) + OK
Jumping to U-Boot(0x00200000) via ARM Trusted Firmware(0x00040000)
Total: 118.648 ms

INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-499-ge63a16361:derrick.huang
NOTICE:  BL31: Built : 10:58:38, Jan 10 2023
INFO:    spec: 0x13
INFO:    ext 32k is valid
INFO:    ddr: stride-en 4CH
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0
INFO:    system boots from cpu-hwid-0
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:    dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:    dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:    dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:    dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
INFO:    BL31: Initializing BL32
INFO:    hdmirx_handler: dma not on, ret
I/TC:
I/TC: OP-TEE version: 3.13.0-652-g4542e1efd #derrick.huang (gcc version 10.2.1 20201103 (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16))) #5 2022年 09月 20日 星期二 09:41:09 CST aarch64
I/TC: Primary CPU initializing
I/TC: Primary CPU switching to normal world boot
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9


U-Boot 2017.09(u-boot commit id: 0c26676955)(sdk version: rk3588_linux_release_20230403_v1.0.6f)-g0c26676955 #lvsx (Aug 19 2023 - 09:20:00 +0800)

Model: Rockchip RK3588 Evaluation Board
PreSerial: 2, raw, 0xfeb50000
DRAM:  "Error" handler, esr 0xbe000011

* Reason:        Exception from SError interrupt
* ELR(PC)    =   00000000002bc254
* LR         =   0000000000218e18
* SP         =   000000000037fc00
* ESR_EL2    =   00000000be000011
* Reloc Off  =   0000000000000000

x0 : 00000000eb9ffeb0 x1 : 0000000000000000
x2 : 0000000000000150 x3 : 0000000000000048
x4 : 0000000000000000 x5 : 0000000000000108
x6 : 0000000000000000 x7 : 0000000000000000
x8 : 0000000000000000 x9 : 00000000fe680000
x10: 0000000000000058 x11: 00000000ffffffff
x12: 00000000efffffff x13: 00000000f0000000
x14: 000000000035d990 x15: 0000000000000020
x16: 0000000000000000 x17: 0000000000000000
x18: 000000000037fe30 x19: 00000000002c5c88
x20: 00000000002c5ba0 x21: 0000000000000000
x22: 0000000000000000 x23: 0000000000000000
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 000000000037fde0


Call trace:
  PC:   [< 002bc254 >]
  LR:   [< 00218e18 >]

Stack:
        [< 002bc254 >]

Copy info from "Call trace..." to a file(eg. dump.txt), and run
command in your U-Boot project: ./scripts/stacktrace.sh dump.txt

Resetting CPU ...

### ERROR ### Please RESET the board ###